Dynamic Voltage and Frequency Scaling (DVFS) is one of several dynamic power management( DPM) techniques for reducing power consumption. This technique is about scaling the clock frequency and the operating voltage.
There is a proportionality between the clock frequency and the processor power: a higher clock frequency causes a proportionally higher power consumption of the processor. There is even a quadratic relationship between the operating voltage and the power consumption. A reduction in the operating voltage thus results in significantly lower power consumption. If both parameters, the clock frequency and the operating voltage, are reduced at the same time, the reduction in power consumption even occurs to the third power.
These findings are implemented in the DVFS technology by defining the maximum possible clock frequency and operating voltage for the processors and controlling them by software during operation. The DVFS technology therefore works with various algorithms that estimate the possible utilization and idle phases and derive their control mechanisms from this.