scalable coherent interface (SCI)

Scalable Coherent Interface (SCI) is an IEEE standard for high-speed interconnections of multiprocessor systems. The IEEE 1596 standard dates back to the 1990s and aimed at a scalable interface with system-wide coherence.

The SCI interface can be seen as a replacement for buses, without their limitations in terms of scalability and performance. It is used, among other things, in larger clusters with HS transmission and forms a packet-switched network in which the data is transmitted unidirectionally via point-to-point links. The data can be transmitted serially at transfer rates of 1 Gbit/s or in parallel at 1 GB/s. The SCI standard recognizes two interface levels: the physical one for the electrical signals and data connectors, and the logical one in which the address space is described, as are the protocols, the mechanism for cache coherence, the status registers and error detection.

Scalable Coherent Interface describes an address space of 64 bits, equivalent to 16 exabytes( EB), in which 16 bits, 65,536 are allocated for the nodes and the remaining 48 bits for the addresses within the nodes.